This project addresses the issue for data sorting on FPGA. The project focuses on the efficient design of a data sorting technique which uses FPGA resources effectively and efficiently.
Synthesizable Data Sorting Algorithm Using FPGA
This project addresses the issue for data sorting on FPGA. The project focuses on the efficient design of a data sorting technique which uses FPGA resources effectively and efficiently.
The project objective was to design an efficeint algorithm for data sorting that make use of an intillegent logic instead of loops which consume more FPGA resources.
The project will be implemented on FPGA kit using Xilinx software using verilog language, which is a hardare decription language.
This project will benfit the ongoing research in FPGA community specially research which focuses on Artificial Intelligence. In AI big data needs to be processesed, the very first step in AI research is to sort the data which requires either big hardware or a third party software to sort the data, so the design will help the researchers in sorting big data using hardware resources on FPGA.
A hardware design will be implemented on FPGA kit using Xilinx software and hardware description language coding will be done in verilog.
| Item Name | Type | No. of Units | Per Unit Cost (in Rs) | Total (in Rs) |
|---|---|---|---|---|
| DIGILENT - ATLYS SPARTAN-6 LX45 FPGA TRAINER BOARD | Equipment | 1 | 70000 | 70000 |
| Shipping charges | Miscellaneous | 1 | 10000 | 10000 |
| Total in (Rs) | 80000 |
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