Implementing MIMO communication system in FPGA using efficient hardware software co-Design

Multiple input and Multiple output communication systems (MIMO) as the name implies makes use of multiple antennas at the transmitter and receiver to increase the diversity and/or capacity of a communication system through spatial multiplexing. It exploits the multipath fading in the channel which i

Project Title

Implementing MIMO communication system in FPGA using efficient hardware software co-Design

Project Area of Specialization

Internet of Things

Project Summary

Multiple input and Multiple output communication systems (MIMO) as the name implies makes use of multiple antennas at the transmitter and receiver to increase the diversity and/or capacity of a communication system through spatial multiplexing. It exploits the multipath fading in the channel which is generally considered to be an impairment for single input and single output (SISO) conventional communication system due to various received multipath components differing in angle of arrival, time delays or frequency (i.e. Doppler spread). As a result, the received signal fluctuates/fades in space, time and frequency through superposition of these multipath components which subsequently causes severe degradation of reliability and quality of received signal and impose constraints on high data rate for a communication system. MIMO technology addresses both the issues of problems caused by multipath fading in a conventional communication system as well as the constraints imposed by resource available through multiple antennas at the transmitter and receiver by exploiting the scattering in the environment to increase system capacity. Therefore in addition to time and frequency dimension ordinarily exploited by conventional communication systems, MIMO can also make use of spatial dimension. They are known to provide capacities many times that of the conventional Shannon limit and in principle can attain spectrum efficiencies in excess of tens of bits/sec/Hz especially. MIMO has been considered to be a significant breakthrough with promising prospects to provide high data rate demands for the wireless industry and is ready to make its presence felt in standard driven industry products.

The Aim of the present project shall be to implement the MIMO communication system in FPGA using VHDL hardware description language with FPGA in loop with simulink. Data shall be transmitted and received through the MIMO communication chain that shall incorporate source coding, error control coding, modulation and demodulations, MIMO Channel estimation and MIMO detection blocks all implemented in FPGA using VHDL.

We make use of the Spatial multiplexing scheme to Implement MIMO communication system in FPGA. VHDL design of maximum likelihood detector shall be carried out which shall ratify the diversity advantage and capacity gains theoretically perceived. A thorough analysis of the suboptimal schemes like V-BLAST, MMSE and ZF detector shall be also be carried out. We shall carry out the Matlab simulation of the BER performance versus SNR, varying different parameters like MIMO detectors, modulation schemes, and error control coding techniques and observe the affect. Once the Matlab design is verified we shall then implement MIMO receiver in the baseband in FPGA using VHDL and carry out hardware in a loop simulation using Hardware Software Co-design approach.However pass band processing shall be in simulink.

Project Objectives

The major objectives  of the project shall be:

1. Thorough analysis of optimal and suboptimal MIMO detection techniques shall be carried out. Space time coding as well as spatial multiplexing schemes shall be studied and implemented using Matlab.
2. Matlab simulation of the MIMO communication chain incorporating source coding, error control coding, modulation and demodulation, Channel estimation and MIMO detection  as well as the frequency,phase and timing  estimation shall be carried out in a Block Rayleigh fading environment. We shall make use of independent and identically distributed (i.i.d) Rayleigh fading channel as well as Finite scatterers channel model to simulate the MIMO channel. Various kind of MIMO detectors like Zero forcing, MMSE detectors, V-BLAST and Maximum likelihood detector (MLD) shall be implemented in Matlab. Bit error rate performance of each shall be analyzed which shall ratify the diversity advantage and capacity gains perceived. Simulations shall culminate with comparative analysis of each with regards to performance and computational complexity.
3.  For 2 by 2 MIMO system the optimum detector shall be selected based on computational complexity and performance indicators. Initially we shall implement Demodulator, MIMO channel estimation and MIMO detection using Maximum Likelihood MIMO detector in FPGA using VHDL through Xilinx system Gnerator or HDL coder &verifier. Each one of these blocks so designed using VHDL shall be tested with test bench waveforms in Vivado HL system edition and then synthesized and implemented on FPGA. Thereafter Hardware (i.e. FPGA) in a Loop Simulation shall be carried out using simulink and Xilinx system generator to obtain BER vs SNR curve. Though the receiver shal be implemented in baseband but all the pass band band processing for a MIMO communication chain shall be done in simulink/Matlab including maximum liklihood estimation of frequency and phase as well as timing estimation. 
4. Lastly if time permitted we shall also stream a video through our aforementioned FPGA in a loop Hardware Software co-design of MIMO communication Chain.

Project Implementation Method

The Aim of the present project shall be to implement the MIMO communication system in FPGA using VHDL hardware description language as well as carry out a FPGA in loop simulation using xilinx system generator and interfacing with simulink. Data shall be transmitted and received through the MIMO communication chain. This shall include source coding, error control coding, modulation and demodulations, MIMO Channel estimation and MIMO detection blocks as well as the maximum liklihood estimation of phase and frequency and timing recovery block. However all  the pass band processing shall be implemented in simulink but  receiver shall be designed in the baseband that includes digital matched filerting, MIMO detection using MLD detector and channel Estimation in FPGA using VHDL through Xilinx system Gnerator or HDL coder &verifier. Each one of these blocks so designed using VHDL shall be tested with test bench waveforms in Vivado HL system edition and then synthesized and implemented on FPGA. Thereafter Hardware (i.e. FPGA) in a Loop Simulation shall be carried out using simulink and Xilinx system generator to obtain BER vs SNR curve. Though the receiver shall be implemented in baseband but all the pass band band processing for a MIMO communication chain shall be done in simulink/Matlab including maximum liklihood estimation of frequency and phase as well as timing estimation.In the end we shall also try to stream video through our MIMO communication chain in real time.

Benefits of the Project

The proposed project involves the application of Digital signal processing, Wireless and digital communications, MIMO communications systems as well as VHDL implementation of signal processing algorithm in FPGA. In additions we shall be able to make use of software like Vivado HL System Edition and Matlab/simulink   to verify (i.e. test bench waveforms),synthesize as well as implement the receiver in hardware and  carry out a FPGA in loop simulation to obtain BER vs SNR curve that shall verify the diversity and capacity gains theoretically perceived for a Given MIMO detector. This project is scalable and first in the series of subsequent final year projects that will lead to the development and Design of a standalone MIMO test bed that can help in the design, analysis and rapid prototyping of future MIMO systems research. Therefore the said project imparts a very rich understanding of Digital signal processing, wireless communications, hardware description languages, implementation of signal processing algorithm in FPGA, digital designing and simulation making use of vivado HL system edition and Matlab/Simulink simulations. It shall also teach how FPGA in loop testing can be done in addition to the detailed understanding of emerging technologies such as MIMO communications systems for wireless communications.

Technical Details of Final Deliverable

1. Thorough analysis of optimal and suboptimal MIMO detection techniques shall be carried out. Space time coding as well as spatial multiplexing schemes shall be studied and implemented using Matlab.
2. Matlab simulation of the MIMO communication chain incorporating source coding, error control coding, modulation and demodulation, Channel estimation and MIMO detection  as well as the frequency,phase and timing  estimation shall be carried out in a Block Rayleigh fading environment. We shall make use of independent and identically distributed (i.i.d) Rayleigh fading channel as well as Finite scatterers channel model to simulate the MIMO channel. Various kind of MIMO detectors like Zero forcing, MMSE detectors, V-BLAST and Maximum likelihood detector (MLD) shall be implemented in Matlab. Bit error rate performance of each shall be analyzed which shall ratify the diversity advantage and capacity gains perceived. Simulations shall culminate with comparative analysis of each with regards to performance and computational complexity.
3.  For 2 by 2 MIMO system the optimum detector shall be selected based on computational complexity and performance indicators. Initially we shall implement Demodulator, MIMO channel estimation and MIMO detection using Maximum Likelihood MIMO detector in FPGA using VHDL through Xilinx system Gnerator or HDL coder &verifier. Each one of these blocks so designed using VHDL shall be tested with test bench waveforms in Vivado HL system edition and then synthesized and implemented on FPGA. Thereafter Hardware (i.e. FPGA) in a Loop Simulation shall be carried out using simulink and Xilinx system generator to obtain BER vs SNR curve. Though the receiver shall be implemented in baseband but all the pass band band processing for a MIMO communication chain shall be done in simulink/Matlab including maximum liklihood estimation of frequency and phase as well as timing estimation. 
4. Lastly if time permitted we shall also stream a video through our aforementioned FPGA in a loop Hardware Software co-design of MIMO communication Chain.

Final Deliverable of the Project

HW/SW integrated system

Type of Industry

IT , Manufacturing , Media , Telecommunication

Technologies

Internet of Things (IoT), Robotics

Sustainable Development Goals

Industry, Innovation and Infrastructure, Responsible Consumption and Production

Required Resources

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