Adil Khan 9 months ago
AdiKhanOfficial #FYP Ideas

Implementation of channel coding using FPGA

In our project we are going to study about block codes and convolutional codes and implement it on FPGA (field programmable gated array). FPGA is an integrated circuit that can be programmed in the field after manufacture. FPGA configuration is generally specified using hardware descriptive language

Project Title

Implementation of channel coding using FPGA

Project Area of Specialization

Information & Communication Technology

Project Summary

In our project we are going to study about block codes and convolutional codes and implement it on FPGA (field programmable gated array). FPGA is an integrated circuit that can be programmed in the field after manufacture. FPGA configuration is generally specified using hardware descriptive language (HDL) which not only simulate but also design the circuit. In our project we are using VHDL which is a non-sequential language generally used for simulation purpose.

Project Objectives

1. The primary objective of our project is error detection.
2. To make error probability very small.
3. To have interference free system or channel.
4. To make transmission free of noise and errors.

The objective of our project is to develop a device which is used for a noise free transmission system. To protect the data from being corrupted in the transmission channel. To increase the error correction capability. Many communication channels are subject to channel noise, and thus errors may be introduced during transmission from the source to a receiver. Error detection techniques allow detecting such errors.

Project Implementation Method

We are using two methods for project implematation

  1. MATL|AB Simulation
  2. VHDL Simulation

Benefits of the Project

As wireless communication is growing day by day it is also becoming important that the data we transfer must be free from every error. In current state of art while doing channel coding implementation our utmost duty is to have reduce complexity, less power consumption, reduced size of it as well as cost reduction.

Technical Details of Final Deliverable

Final Deliverable of the Project

Hardware System

Core Industry

Telecommunication

Other Industries

Core Technology

Others

Other Technologies

Sustainable Development Goals

Industry, Innovation and Infrastructure

Required Resources

Item Name Type No. of Units Per Unit Cost (in Rs) Total (in Rs)
FPGA card, pynq development board Equipment16000060000
Total in (Rs) 60000
If you need this project, please contact me on contact@adikhanofficial.com
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