Design and Development of an IC based RF Receiver

The project is an INTEGRATED CIRCUITS (IC) BASED RADIO FREQUENCY (RF) RECEIVER, which is essentially a superheterodyne receiver that uses frequency mixing to convert a received signal to a fixed intermediate frequency (IF). This signal can then be more conveniently processed than the original carrie

2025-06-28 16:26:16 - Adil Khan

Project Title

Design and Development of an IC based RF Receiver

Project Area of Specialization Electrical/Electronic EngineeringProject Summary

The project is an INTEGRATED CIRCUITS (IC) BASED RADIO FREQUENCY (RF) RECEIVER, which is essentially a superheterodyne receiver that uses frequency mixing to convert a received signal to a fixed intermediate frequency (IF). This signal can then be more conveniently processed than the original carrier frequency. The receiver is designed for Wireless applications at S-band operating within 2.4-2.5 GHz frequency range. The design consists of a number of RF components which are designed, configured and optimized to produce the required results.

'Design and Development of an IC based RF Receiver' _1659402263.png

               Figure 1: Signal Flow Diagram

The most important feature of the superheterodyne receiver is its selectivity i.e., the capability to select and process small signals in the presence of strong interferers.

The final product will be the designed receiver system fabricated on a Printed Circuit Board (PCB) which can be incorporated in the signal flow chain (as shown in Figure 1) for signal processing. The receiver system will generate an analog signal at its output which can be converted into other forms as desired.

               Figure 1: Signal Flow Diagram

Project Objectives Project Implementation Method

Design Specifications: 

Specification

Value

Operating Frequency Range (Receiver)

2.4-2.5 GHz

RF Centre Frequency

2.45 GHz

RF Bandwidth

100 MHz

IF Cutoff Frequency

50 MHz

LO Frequency

2.5 GHz

Patch Antenna (operating frequency)

2.45 GHz

 Block Diagram:

'Design and Development of an IC based RF Receiver' _1659402264.png

                        Figure 2: Block Diagram

The block diagram shows the receiver architecture. Starting from the antenna, which is used for the reception of radiofrequency, these signals are converted into electric currents which are then processed by the subsequent microwave circuit. 

At the RF chain input, the receiver receives RF frequencies through the antenna which are filtered out by the Band Pass Filter. The filtered frequencies are amplified by the Low Noise Amplifier producing an appropriate signal level that is down converted by the mixer.

The Voltage Controlled Oscillator provides a stable local oscillator (LO) frequency for frequency down conversion at the mixer LO port. The mixer performs the actual down conversion to produce an intermediate frequency (IF) at its output port.

The IF signal is filtered by the Low Pass Filter in the IF chain to get rid of the high frequencies and harmonics. This signal is then amplified to produce a reasonable output.   

Specification

Operating Frequency Range (Receiver)

RF Centre Frequency

RF Bandwidth

IF Cutoff Frequency

LO Frequency

Patch Antenna (operating frequency)

                        Figure 2: Block Diagram

Benefits of the Project Technical Details of Final Deliverable

'Design and Development of an IC based RF Receiver' _1659402265.png 

 Figure 3: Complete structural design of the receiver

 The final design of the receiver can be seen in Fig.3. The design has been established after the design and exploration of the RF components and their variants at the system level, followed by the co-simulation and configuration of the individual components and concluded with the co-simulation and verification of the entire system, taking into account parasitic interconnections and substrate effects.

Individual Components:

'Design and Development of an IC based RF Receiver' _1659402266.png

             Figure 4: Design of receiver antenna

 The receiver antenna is a Patch Antenna (as shown in Fig.4) which has been designed using the inset feed topology for operation in the desired frequency band i.e., 2.4-2.5 GHz.

'Design and Development of an IC based RF Receiver' _1659402267.png

                    Figure 5: Band Pass Filter

The Band Pass Filter (as shown in Fig. 5) is designed using Microstrip Coupled Lines which filters out the received radio signals to obtain the frequencies in the desired frequency band.

'Design and Development of an IC based RF Receiver' _1659402268.png

                    Figure 6: Low Pass Filter

The Low Pass Filter (as shown in Fig. 6) is designed using Lumped Components which filters out the frequencies generated at the output port of the mixer to obtain an intermediate frequency which is lower than the received radio frequency and can be easily processed.

'Design and Development of an IC based RF Receiver' _1659402269.png

         Figure 7: Low Noise Amplifier (SAV-541+)

The Low Noise Amplifier (Fig.7) is the SAV-541+ which is a high IP3 transistor device, manufactured using E-PHEMT technology enabling it to work with a single positive supply voltage. It has outstanding Noise Figure, particularly below 2.5 GHz.

'Design and Development of an IC based RF Receiver' _1659402269.png

            Figure 8: Power Amplifier (PGA-105+)

The Power Amplifier (Fig.8) is the PGA-105+ which is an advanced ultra-flat gain amplifier fabricated using E-PHEMT technology and offers extremely high dynamic range over a broad frequency range and with low noise figure. In addition, the PGA-105+ has good input and output return loss over a broad frequency range without the need for external matching components.

'Design and Development of an IC based RF Receiver' _1659402270.png

                  Figure 9: Mixer (MCA-35 MH+)

The Frequency Mixer (Fig.9) is the MCA-35 MH+ which is a non-linear three port device that performs the frequency mixing of the two signals applied at its input ports.

'Design and Development of an IC based RF Receiver' _1659402271.png

Figure 10: Voltage Controlled Oscillator (ROS-3050-819+)

The Voltage Controlled Oscillator (Fig.10) is the ROS-3050-819+ which produces a periodic AC signal whose oscillation frequency is determined by its input voltage.

'Design and Development of an IC based RF Receiver' _1659402272.png

                  Figure 11: Attenuator (PAT-3+)

 Figure 3: Complete structural design of the receiver

             Figure 4: Design of receiver antenna

                    Figure 5: Band Pass Filter

                    Figure 6: Low Pass Filter

         Figure 7: Low Noise Amplifier (SAV-541+)

            Figure 8: Power Amplifier (PGA-105+)

                  Figure 9: Mixer (MCA-35 MH+)

Figure 10: Voltage Controlled Oscillator (ROS-3050-819+)

                  Figure 11: Attenuator (PAT-3+)

Final Deliverable of the Project Hardware SystemCore Industry TelecommunicationOther IndustriesCore Technology OthersOther TechnologiesSustainable Development Goals Industry, Innovation and Infrastructure, Sustainable Cities and CommunitiesRequired Resources

Specification

Value

Operating Frequency Range (Receiver)

2.4-2.5 GHz

RF Centre Frequency

2.45 GHz

RF Bandwidth

100 MHz

IF Cutoff Frequency

50 MHz

LO Frequency

2.5 GHz

Patch Antenna (operating frequency)

2.45 GHz

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