Gate Driver Circuit Analysis for MOSFETs

 MOSFET is a key component for high frequency and high efficiency switching applications across the electronics industry. One of the major problems with MOSFETs is that at high frequency switching losses occur due to the parasitic capacitances between Gate-Source and Gate-Drain. In order to min

Project Title

Gate Driver Circuit Analysis for MOSFETs

Project Area of Specialization

Electrical/Electronic Engineering

Project Summary

 MOSFET is a key component for high frequency and high efficiency switching applications across the electronics industry. One of the major problems with MOSFETs is that at high frequency switching losses occur due to the parasitic capacitances between Gate-Source and Gate-Drain. In order to minimize these losses, we incorporate gate drivers in our circuits to give enough current to the MOSFET and minimize the switching delay, but which gate driver design gives the least switching delay and causes minimum switching losses is still a debate therefore we decided to design this project which will provide a detailed analysis between many designs of gate drivers. For this analysis first we will design boost DC to DC converters, a power source and then a resistive load of 50W for our main circuit. Moreover, we will be using Arduino At-mega to provide high frequency PWM to our gate drivers which will be connected to the MOSFETs. Integrating the Graphs during a single cycle, Power losses due to switching will be calculated and by comparing those losses the conclusions will be drawn about which gate driver is the best one amongst the designed drivers at different atmospheric conditions. Comparative analysis on this is very necessary, it can guide people in making a circuit which is the most efficient for their application and moreover it’s a unique study as study like is not done in Pakistan before our project.

Project Objectives

• ·Designing a Buck and Boost Converter with a resistive load of 50W at certain voltage.

• ·8 different types of Gate Drivers with snubber circuit and heat sink protection.

• ·Driving MOSFET using different Gate Drivers at High Frequency.

• ·A Comparative analysis using numerical data of MOSFET’s working with all 8 Gate drivers.

Project Implementation Method

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Benefits of the Project

High frequency switching reduces component  size, weight, lower output ripple and faster transient response time. 

Applications such as Electric Vehicles (EV) and Hybrid Electric Vehicles (HEV), charging systems as well as distributed photovoltaic power generation systems, UPS, welding or medical systems are following the idea into fast switching devices.

There is no study in the market regarding gate drivers comparative analysis.

Technical Details of Final Deliverable

Metal-oxide-semiconductor field-effect transistor or MOSFETs are hard to operate as they can be easily damaged when operated at high frequency due to heat dissipated by switching losses. Now these losses occur due to the presence of parasitic capacitances these capacitances occur between Gate -Source and Gate-Drain, so for MOSFET to be in conduction mode first these capacitors must be fully charged. Logic IC does not have the current capacity to do so fast enough so that we can minimize the switching losses.

As it can be seen from the graph below it shows the curves of current and voltage across the MOSFET of a DC to DC converter circuit and as you can see even when MOSFET starts conducting meaning value of current is non zero the value of the voltage does not go to zero immediately, causing a time gap in which there is presence of both voltage and current, so making losses occur in this time, and these losses are called switching losses.

Now by multiplying the integrals of both graphs lines we find the following graph:

In this graph you can see that the points where losses occur. These losses are very significant as they occur every cycle. In the example above as the switching frequency was about 10kHz, loss due to switching occurred almost every 100us. If we increase the frequency of these losses will increase as it can be seen in the figure below (fs= 20kHz),

These losses can be decreased by a lot if we somehow manage to reduce the amount of the time it gets for Vds to go zero and vice versa, once a transition in the gate signal occurs. This can be done by providing more current in the gate terminal and also greater voltage to the gate. Both of this can be done by providing a gate pulse by a gate driver circuit. 

Now which gate driver is best at which frequency, which gate driver is best for certain amount of load and which gate driver performs best at a certain temperature? So, in order to do that we first will design and fabricate DC to DC converters (Boost).  The DC-to-DC converters would be designed to signify the utility of a gate driver which is essential for a switching device.  Then we will design the 8 different designs of gate drivers, these designs will be then tested with load of rating 50 W, variable frequency and at different temperature and their data will be compared to be critically analyzed to see that which design works best at high temperatures, high frequencies producing minimal switching losses or can drive a high load easily without damaging the circuit.

Final Deliverable of the Project

Hardware System

Core Industry

Others

Other Industries

Education

Core Technology

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Other Technologies

Sustainable Development Goals

Climate Action

Required Resources

If you need this project, please contact me on contact@adikhanofficial.com