Over the years, there has been advancement in digital communication systems, in which information is represented in the form of bits. The binary bits are then modulated into analog signal waveforms and transmitted over a communication channel. The channel introduces noise and interference and corrup
Channel Coding implementation on FPGA
Over the years, there has been advancement in digital communication systems, in which information is represented in the form of bits. The binary bits are then modulated into analog signal waveforms and transmitted over a communication channel. The channel introduces noise and interference and corrupts the signal that has been transmitted. At the receiver’s side, the channel corrupted transmitted signal is demodulated into binary bits. The transmission may cause bit errors, and the number of errors and dependent on the noise and interference introduced by the channel.
Here comes the role of channel coding. Channel coding is done for protecting the digital information from noise and interference and hence there is a reduced number of bit errors. Channel coding is mostly accomplished by introducing bits into the transmitted signal. These additional bits will allow detection and correction of bit errors in the received data stream and provide more reliable information transmission.
There are several coding techniques but our project is mainly based on convolutional coding since convolutional coding is the most common and practical technique of coding that is being used for communication systems.
In this project, we will implement the channel coding to FPGAs and check the performance.
Our methodology includes:
Literature Review:
At the initial point, we have started with the literature review that includes the study of different techniques of Channel coding. The different techniques consist of:
These are the most widely used channel codes in practical communication systems. These codes are primarily used for real-time error correction. Convolutional codes convert the entire data stream into one single codeword. The encoded bits depend not only on the current k input bits but also on past input bits.
Block codes are based rigorously on finite field arithmetic and abstract algebra. They can be used to either detect or correct errors. Block codes accept a block of k information bits and produce a block of n-coded bits. By predetermined rules, n-k redundant bits are added to the k information bits to form the n coded bits. Commonly, these codes are referred to as (n, k) block codes.
It is a near-channel capacity error-correcting code. This error-correcting code is able to transmit information across the channel with an arbitrary low (approaching zero) bit error rate. This code is a parallel concatenation of two-component convolutional codes separated by a random interleaver. It has been shown that a turbo code can achieve performance within 1 dB of channel capacity.
Mainly, we have targeted the convolutional and block codes but if possible we’ll move to the turbo codes as well.
Our first step is the convolutional coding technique.
Software Implementation:
For the software implementation of this project, we will use python to create the required functions.
Hardware Implementation:
After the software implementation, we’ll move forward to the hardware part. For that, we are using Quartus for the code of FPGA. The python code that will be created in the software implementation part will automatically generate the Verilog code through Quartus on FPGA. We are using Quartus prime lite edition acquired from the site of Intel. Furthermore, we will be using Cyclone V (DE1-SOC). If we are successful in that, we will move towards ASIC.
Documentation:
After the Hardware Implementation, we’ll check the performance of FPGAs and write accordingly our observation.
In the form of a document, we’ll be able to describe the whole process of implementation.
Report Writing:
The report writing is the hard copy of the whole procedure we’ll follow for the designing of the project, its implementation, observation, and final results. The report will consist of detailed information about the project that we’ll make. The report is the hard copy of all the efforts and the progress that’ll be made in the final year project.
Channel coding is of great importance in digital communication, as it increases the capacity,as more data is sent, link noise and interference increases however due to error correction done through channel coding system is able to tolerate increased errors and therefore allows greater capacity which ultimately results in lower per user cost. This makes our project a beneficial contribution.
The technical procedure of our project is as follows:
| Item Name | Type | No. of Units | Per Unit Cost (in Rs) | Total (in Rs) |
|---|---|---|---|---|
| Cyclone V GX Starter kit | Equipment | 1 | 70000 | 70000 |
| Total in (Rs) | 70000 |
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